Staff Engineer - Timing Methodology

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Company Overview

Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With increased power requirements of artificial intelligence (AI) computing, our customers increasingly rely on our solutions to deliver AI to edge environments. Our hardware and software innovations fundamentally deliver a multi-fold improvement in power consumption over traditional semiconductor designs without expensive process geometry scaling. We started in 2010 addressing the needs of battery-powered devices at the edge, where power consumption challenges were most profound. As of the beginning of 2025, we’ve shipped more than 270 million units worldwide.

Our innovative and fast-moving teams of design, research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin and San Jose), Taiwan (Hsinchu), China (Shenzhen and Shanghai), Japan (Tokyo), and Singapore. We value relentless technology innovation, a deep commitment to customer success, collaborative problem-solving, and an enthusiastic pursuit of energy efficiency. We embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies. We encourage and nurture an environment for growth and opportunities to work on complex, meaningful, and challenging projects that will create a lasting impact and shape the future of technology. Join us on our quest for 100 billion devices. The edge intelligence revolution starts here.

Ambiq Micro, a leader in ultra-low power SoCs (Systems on Chips), is seeking a talented Staff Physical Design Engineer to join our growing team. We are the engineers behind the world's most power-efficient microcontrollers, making it possible to create long-lasting battery-powered devices that drive the future of wearable tech, hearables, and IoT.

As a Staff Engineer - Timing Methodology, you will play a critical role in transforming our cutting-edge designs into silicon reality. You will be responsible for all aspects of timing closure from defining methodology, developing flows, closing timing at the block level and timing convergence at SOC level as well.

Responsibilities:

• In-depth expertise on Timing Methodology and Timing closure both at block level and SOC level in modern Finfet and multi-patterning based process technologies using Cadence Tempus or Synopsys Primetime.
• Own all aspects of timing convergence, including Signoff to build timing correlation, PVTRc corner definition, timing margining, extraction, signoff timing analysis, glitch noise analysis, timing ECOs and interplay and tradeoff with power.
• Own, define and drive constraints in collaboration with RTL and IP Vendors.Have in-depth understanding of all timing collaterals for different type of Ips, namely, hard IP, Stdcell and Memory etc.
• Partner with post-si bringup and testing to ensure pre-si timing correlates well to post-si.
• Collaborate closely with RTL designers, DFT and other stakeholders to achieve best in class PPA.
• Continuously improve timing analysis methodologies and scripts to enhance efficiency and flow consistency. Stay at the forefront of advancements in STA and new process nodes

Requirements:

• Master's degree in Electrical Engineering or Computer Engineering (or a related field)
• Minimum of 5 years of experience in Timing Analysis and convergence.
• Proven expertise in static timing analysis using industry standard timing tools like primetime (Synopsys) or tempus (Cadence).
• In-depth understanding of digital circuit design principles and concepts
• Strong proficiency with industry-standard EDA tools (e.g., Synopsys, Cadence)
• Excellent analytical and problem-solving skills
• Ability to work effectively in a team environment and communicate complex technical concepts clearly
• Experience with scripting (e.g., TCL, Python)
• Experience with PnR tools like Fusion Compiler (Synopsys) and Innovus (Cadence) is a plus.

Ambiq is a company that values continued technology innovation, fanatical attention to customer needs, collaborative decision-making, and, above all, enthusiasm for energy efficiency. The incoming candidate should embrace these same values. The successful candidate must be self-motivated, creative, and comfortable learning exciting new technologies. This is an opportunity for growth and work on complex, interesting, and challenging projects.

Most importantly, the successful candidate will be able to live the Ambiq Shared Values:

· Innovate: We tenaciously find ways to break down the barriers to possible solutions

· Collaborate: We proactively communicate and encourage each other to be better.

· Focus: We keep the voice of the customer at the center of everything we do.

· Learn: We strive for continuous improvement and are always curious.

· Achieve: We execute on quality and follow through on our commitments.